[Сергей]

Many times i get situation when i found RR, check with Test Read all is fine, many green sectors

Then reread with NR
And get red ECC map

This happen when second byte of RR = 3
Full RR = xx 03

If you meet this situation look on find RR log, and select RR where second byte is not 3
Try 0, 1 and 2

If somebody make tests with their chips, please tell me about results
May be better remove tests for "3" from library

[Bolo]

it's becouse Second value register of micron have only 4 values - 00b, 01b, 10b, 11b

Attached settings

I think better keep it for future research

[Сергей]

I thnk Persistence must be always Off

Beause it change RR values in chip memory

And if you find good values in middle of ECC map
Then when you read chip from begin, chip will change values in its memory

Thats why i ask make tests

[jeremyb]

I've noticed when crossing the pSLC boundary with v2 into TLC/QLC land the dump will go red. If you skip over pSLC land the dump will be green, with persistence enabled highly recommended for TLC/QLC quality. You can usually spot the pSLC boundary by the extra blocks in the ONFI data.. eg: Total Blocks = 0x880, 0x80 = pSLC land, 0x800 = TLC/QLC land.

I don't think v2 is meant for pSLC land, persistence from pSLC to QLC is like scrambling your brain.. ie: block 1.2.3.4... 80.81.82, it should start at 80
eg: Help.. Help... my pSLC persistence doesn't fit my QLC persistence..

I think this is what you're seeing... Thx for taking the time to ask.. I thought I was the only one who pondered such questions..

[Сергей]